Institute of Communication and Computer Networks

New architectures of optical switching fabrics, their evaluation and comparison



Duration

14.04.2009 – 2012.04.13

Financing entity

National Science Centre (NCN)

Summary

The project team proposed new structures of optical switching fabrics for connection and packet switching, at a cost much lower than in the case of architectures currently known in the literature, while preserving the desired functionality. In addition, new algorithms controlling the operation of the new switching fabrics were also developed. Some of the major project achievements are listed below.

  • A new architecture of optical switching fabrics was proposed, derived from baseline networks. The new architecture is built of 2 x 2, 3 x 3, 2 x 3 and 3 x 2 switching elements. It has one section fewer than a banyan-type fabric of the same capacity (therefore being called a log base(2) of (N-1) switching fabric), thus producing less interference and signal loss.
  • Strict-sense non-blocking (SSNB) and rearrangement conditions were defined for the proposed fabric structure. It has been shown that the proposed multi-stage architecture fulfilling SSNB conditions requires fewer switching points and fewer passive optical splitters and couplers than a regular baseline switching network.
  • A new algorithm was proposed for Distributed Arbitration and rapid Upload of Buffers (DAUB). Simulation experiments have shown that this algorithm enables the achievement of the same results in terms of capacity, cell transfer delay and buffer size for different traffic distributions as in the case of the centralised SDRUB algorithm (Static Dispatching with Rapid Unload of Buffers). The DAUB algorithm applied in the modified MSM Clos network produces better results than the basic MSM Clos structure employing well-known algorithms: CMSD (Concurrent Master-Slave Round-Robin Dispatching) and SRRD (Static Round-Robin Dispatching).
  • Different rearranging algorithms were proposed for fabrics with single and simultaneous switching. Rearranging algorithms known from the literature require many rearrangements of the connections in a switching fabric, though the number of rearrangements was not considered. As a result of their work, the team succeeded in developing a rearranging algorithm that requires only one rearrangement at all times (regardless of the fabric state and new call demands). The works also resulted in developing a modified version of the algorithm in which the rearrangement of a call set up in a switching fabric can be performed without its interruption.
  • A new way of presenting the state of a switching fabric was proposed, which enabled the development of a new rearranging algorithm. As a result of the works on connection route selection algorithms, the team has also determined and proved the maximum number of rearrangements to be performed in order to set up a blocked call. In the worst-case scenario, the presented algorithm requires only three rearrangements.
  • Control algorithms were implemented in hardware controllers built on the basis of the FPGA circuit. The presented results include hardware controllers for baseline switching fabrics, spatial commutators and integrated switching fabrics composed of semiconductor optical amplifiers (SOA).



Publications, reports or patents resulting from the project

01. J. Kleban, “Packet Dispatching Schemes for Three-Stage Buffered Clos-Network Switches,” in Switched Systems, KSTiT 2014, IN-TECH 2009.
02. G. Danilewicz, W. Kabaciński and R. Rajewski, “Nowa architektura pól komutacyjnych zbudowanych z niesymetrycznych komutatorów optycznych,” Krajowe Sympozjum Telekomunikacji i Teleinformatyki, Warszawa Sep. 16-18, 2009 (Przegląd Telekomunikacyjny, vol. 8-9, 2009).
03. W. Kabaciński, J. Kleban, M. Michalski, M. Żal, A. Pattavina and G. Maier, “Rearranging Algorithms for Log2(N, 0, p) Switching Networks with Even Number of Stages,” International Workshop on High Performance Switching and Routing, Paris, France June 22 - 24, 2009. (Część prac była prowadzona w ramach Sieci Doskonałości ,,BONE’’).
04. J. Kleban and Sz. Piotrowski, “Performance Evaluation of Selected Packet Dispatching Schemes for the CBC Switches,” Proc. IEEE GLOBECOM 2009, Hilton Hawaiian Village, Honolulu, Hawaii, USA, 30 Nov.- 4 Dec. 2009. (Część prac była prowadzona w ramach Sieci Doskonałości ,,BONE’’).
05. G. Danilewicz, W. Kabaciński and R. Rajewski, “The New Banyan-Based Switching Fabric Architecture Composed of Asymmetrical Optical Switching Elements,” IEEE GLOBECOM, Honolulu, HI, USA Dec. 2009.
06. J. Kleban, “Performance Comparison Between Packet Dispatching Schemes Employing Distributed and Centralized Arbitration in MSM Clos-Network Switches,” Proc. 16th Polish Teletraffic Symposium 2009, Łódź, Poland, Sep. 24-25, 2009, pp. 83-86. ISBN 978-83-7283-317-4.
07. W. Kabaciński and M. Michalski, “The FPGA Implementation of the log2(N, 0, p) Switching Fabric Control Algorithm,” IEEE International Conference of High Performance Switching and Routing, pp. 114-119, June 2010.
08. G. Danilewicz, W. Kabaciński and R. Rajewski, “The log2N-1Optical Switching Fabrics,” IEEE Transactions on Communications, vol. 58, no. 11, Nov. 2010.
09. Baranowska, W. Kabaciński and Ł. Rubik, “FPGA Implementation of the MMRRS Scheduling Algorithm for VOQ Switches,” Networks.
10. W. Kabaciński, J. Kleban and M. Michalski, “Repackable Multi-plane Banyan-Type Optical Switching Fabrics,” Poznańskie Warsztaty Telekomunikacyjne, Poznań, Dec. 2010.
11. G. Danilewicz, W. Kabaciński and R. Rajewski, “The log2N − 1 Optical Switching Fabrics,” IEEE Transactions on Communications, vol. 59, no. 1, pp. 213-225, Jan. 2011.
12. W. Kabaciński and M. Michalski, “The Algorithm for Rearrangements in the Log2(N; 0; p) Fabrics with Odd Number of Stages,” IEEE International Conference on Communications ICC2011, Kyoto, Japan, 5-9 June 2011.
13. W. Kabaciński and M. Michalski, “The FPGA Controller for the Rearrangeable Log2(N,0,p) Fabrics with an Even Number of Stages,” IEEE International Conference on High Performance Switching and Routing, HPSR 2011, Cartagena, Spain 4-6 Jul. 2011, pp. 58-63.
14. W. Kabacinski and M. Żal, “Banyan type switching network with wavelength routing,” International Conference on Transparent Optical Networks, ICTON 2011, Stockholm, Sweden, 26-30 Jun. 2011.
15. W. Kabaciński and M. Michalski, “Sprzętowy sterownik pola komutacyjnego log2(32,0,7) w układzie FPGA,” Krajowe Sympozjum Telekomunikacji i Teleinformatyki, KSTiT 2011, Łódź, 2011.
16. J. Kleban, “Zmodyfikowane pole Closa typu MSM z arbitrażem rozproszonym,” Krajowe Sympozjum Telekomunikacji i Teleinformatyki, KSTiT 2011, Łódź, 2011.
17. R. Rajewski, “Nieblokowalność w wąskim sensie pola typu multi-log2N-1,” Krajowe Sympozjum Telekomunikacji i Teleinformatyki, KSTiT 2011, Łódź, 2011.
18. R. Rajewski, “Przestrajalność pola typu multi-log2N − 1,” Krajowe Sympozjum Telekomunikacji i Teleinformatyki, KSTiT 2011, Łódź, 2011.
19. M. Michalski and M. Dziuba, “An Educational Model of the Time Space Switch Realized in the FGPA Circuit,” XV Poznań Telecommunications Workshop, PWT 2011, Poznań, Poland 9 Dec. 2011.
20. M. Dziuba, “Comparison of Packet Scheduling Algorithms for VOQ Switches,” XV Poznań Telecommunications Workshop, PWT 2011, Poznań,PWT 2011, Poznań, Poland 9 Dec. 2011.
21. J. Kleban, “Packet Dispatching Scheme Employing Distributed Arbiters for Modified MSM Clos Switching Fabric,” XV Poznań Telecommunications Workshop, PWT 2011, Poznań, PWT 2011.
22. R. Stabile, M. Żal and K.A. Williams, “Integrated Optical Switch Circuit Operating under FPGA Control,” 16th Annual Symposium of the IEEE Photonics Benelux Chapter, 1-2 Dec. 2011, Ghent, Belgium.
23. Praca zbiorowa pod red. dra inż. Mariusza Żala, “Algorytm sterowania wyborem drogi połączeniowej dla zredukowanych pól komutacyjnych realizujących połączenia rozgłoszeniowe,” Raport wewnętrzny Katedry Sieci Telekomunikacyjnych i Komputerowych Politechniki Poznańskiej, nr TR-KK-12/1/2012/P, Poznań, 2012.


Supervisor/coordinator

prof. dr hab. inż. Wojciech Kabaciński

Project Manager (PUT)

prof. dr hab. inż. Wojciech Kabaciński

Project participants (PUT)

prof. dr hab. inż. Wojciech Kabaciński
dr hab. inż. Grzegorz Danilewicz, prof. nadzw.
dr hab. inż. Mariusz Żal
dr inż. Janusz Kleban
dr inż. Marek Michalski
dr inż. Remigiusz Rajewski
Marcin Dziuba
Michał Masztalski
Andrzej Wilde